Design and Implementation of High Performance PPSK demodulator in Biomedical Implant

Background/Objective: The important challenge for the realization of hearing aids is small size, low cost, low power consumption, and better performance, etc. Keeping these requirements in view this work concentrates on the VLSI (Very Large Scale Integrated) implementation of the analog circuit that mimics the PPSK (Passive Phase Shift Keying) demodulator with a low pass filter.
Methodology: This research deals with RF Cochlear implant circuits and their data transmission. A PPSK modulator is used for uplink data transmission in biomedical implants with simultaneous power, data transmission. This study deals with the implementation of a PPSK demodulator with related circuits and a low pass filter which are used in cochlear implants consumes low power and operates at 14MHz frequency. These circuits are designed using FINFET 20nm technology with 0.4v DC supply voltage. Findings: The performance of the proposed design over the previous design is operating at low threshold voltage, reduces static leakage currents, and often observed greater than 30 times of improvement in speed performance Novelty: As the conventional design with the same supply voltage(0.4v) exhibit high power dissipation and delay and require more amount of time to demodulate the signal. Whereas the proposed FINFET based monostable circuit and PPSK demodulator with a low pass filter has proven better in terms of less delay and power dissipation and can transmit the data with less bit error rate in stipulated time.